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Mô tả công việc
- Collaborate with cross-functional teams in Asia and the US on the SiP (system-in -package) module projects
- Conduct technology risk assessments and lead process/product qualifications
- Establish design rules, implement process DOE (Design of Experiments), and optimize processes
- Ensure proper in-line controls and SPC (Statistical Process Control) implementation before production ramp-up
- Generate yield analysis, risk assessments, root cause analysis, and resolve quality issues
- Work as a supplier quality development engineer, acting as a manufacturing site/ products owner
Yêu cầu
Minimum Qualifications
Ideal candidate should have around 8 to 15 years of experience in products or process development in Semiconductor IC Packaging Engineering.
Bachelor's or master's degree in engineering, Physics, or Material Science related fields.
Strong communication skills, with proficiency in spoken and written English
Demonstrated problem solving skill and leadership skills.
Ideal candidate should have around 8 to 15 years of experience in products or process development in Semiconductor IC Packaging Engineering.
Bachelor's or master's degree in engineering, Physics, or Material Science related fields.
Strong communication skills, with proficiency in spoken and written English
Demonstrated problem solving skill and leadership skills.
Thông tin khác
Experience in managing a team or experience in Assembly R&D team
Additionally, expertise in diverse area such as materials, wafer DPS, wafer bumping, manufacturing, or quality engineering would be highly beneficial.
A team player who is self-motivated, result oriented and detail driven
Willingness to travel across Asia to provide engineering support
Experience in AIML and lean factory would be a big plus, or Knowledge in deep learning (DL) or statistical machine learning (ML) is preferred.
Thông tin chung
- Ngày hết hạn: 20/04/2025
- Thu nhập: Thỏa thuận