• Perform Signal Integrity (SI) & Power Integrity (PI) analysis and simulation for PCB & Substrate MLO designs to ensure signal performance and reliability.
• Collaborate with PCB, substrate MLO teams to optimize component, materials, layer stack-up, placement, power plane, signal routing,...
• Evaluate high-speed signal performance, power delivery network (PDN), and EMC/EMI characteristics such as insertion loss, return loss, impedance, crosstalk, eye diagram, ...
• Conduct Pre-layout & Post-layout simulations to validate design criteria before manufacturing.
• Analyze internal technical research (ITR) to develop solutions and design guidelines.
• Bachelor's degree in
Electrical Engineering, Telecommunications, ...
• Have a good background in electronics component, electrical fundamental, ...
• Have a knowledge about high-speed interface like PCIE, USB, ...
• Have a knowledge about power supply like LDO, DC-DC switching regulator,...
• Fresher graduates with a strong academic record (high GPA) are encouraged to apply
• Familiar with Ansys SIwave /Electronic Desktop, Cadence Sigrity SI/PI is desirable, though not essential.
• Comprehensive training will be provided.
• Ability to work independently as well as with team members.
• Able to write and communicate in English.