Design For Test

● Deep submicron ASIC's Test Strategy planning and Design verification work
● SCAN, MBIST implementation
● HIP Test method design of work
● LBIST/POST such as the Automotive DFT feature
● DFT Implementation and Diagnosis
● Chip DFT architecture implementation
● Logic DFT: SCAN architecture configuration, ATPG, and Diagnosis
● Memory DFT: BIRA/BISR, BIST, and Diagnosis
● DFT for Analog IP, Special IO, and Automotive device
● DFT design verification