Design Verification Engineer

* Role Description
In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition
• Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.
• Develop ASIC verification environment including all the respective components such as stimulus, checkers, assertions, monitors and scoreboards.
• Develop directed and constrain-random verification functional tests and simulate using EDA tools to verify functional spec is working
• Execute verification plans, including design bring-up, DV bring-up, regression enabling for all the features.
• Collaborate with digital design team to debug functional testcases and deliver functionally correct designs
The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment