Engr, ASIC Design

Job Type: Permanent - Full Time

Travel Required: 0%

Remote Work Available: No

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world's leading manufacturers of the electronics you rely on every day; you may not see our products, but they are all around you.

Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what's next in electronics and the world.

Renesas is looking for a Digital Designer/Verification Engineer for our Power IC development team. This team develops high performance integrated solutions. The environment is fast paced and team members are empowered to make decisions within the scope of their job function. The successful candidate will be responsible for designing digital circuits and developing the mixed signal verification environment.

Job Responsibilities:
• Actively involved in all stages of product development including specification, design, synthesis, verification, timing analysis, design for test and silicon debug.
• Architecting and writing the RTL for such circuits as digital interfaces, controllers, state machines and algorithms.
• Performing synthesis and achieving timing convergence.
• Develop and verify self-tested test benches for Mixed Signal chips and sub-circuits.
• Strives for maximal verification coverage in the most time efficient manner.
• Works with team to integrate the AMS and DV verification plans into one Master verification plan.
• Works diligently to accomplish project goals and meet schedule requirements.
• Drives towards continuous personal, team, project and Company improvement

Requirements:
• Experience in Verilog RTL coding and versed in VerilogAMS, VerilogA, Verilog (or SV) languages for both ASICs and FPGAs
• Proficient developing design constraints and Synthesis scripts.
• Experience with behavioral top level modeling and mixed signal verification methodology.
• Experience with scan insertion and ATPG generation.
• Must be able to work independently with limited supervision. Must be very organized, self-motivated and passionate about the work.
• MSEE/PhD, or BSEE with relevant work experience with a strong background in digital design.
• Language skills: Written and verbal English language proficiency required.
• Tools: Cadence Design Tools and Synopsys DC proficiency required. Cadence AMS design flow experience is a definite plus.

Renesas Electronics America is an equal opportunity and affirmative action employer, committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by federal, state or local law.