Senior Circuit - Layout - Physical Design Engineer

Our Company:
Accuchip Technology is a high-tech company that dedicates to advanced semiconductor IP R&D and services and empowering chip design and system applications. It fully enables chip design by the independent research and development of advanced process chip IP products in response to World's growing needs of chip and application.
With its unique values and advantages, such as high stability, strong compatibility, cross-process, and portability of its IP products, Accuchip Technology serves all important fields of the digital society.
Position:
Staff, Senior Circuit Design Engineer
Senior Layout Design Engineer
Senior/ Experienced Physical Design Engineer
Staff, Senior Circuit/ Senior Layout Design Engineer
Job Description:
Develop design for Memory IPs, Standard Cells, and IOs.
Provide supports and perform assignments as assigned and required.
Receive requirements and instructions on all work for supervisors.
Follow standard practices and procedures to perform assignments.
Apply company policies and procedures to resolve issues and problems.
Requirements:
BS degree or above, Electronics Engineering, Electromechanics, Physics, Telecommunications, Mathematic & Computer Science, or related fields.
Have experiences in Standard Cell Library development
Have experiences and understand about TSMC SCL N7 vs N6
Have experiences in SCL characterization, and ASIC Synthesis and Place & Route flows
Knowledge of Device Physics (CMOS), Circuit theory, Digital/Analog circuit design, Digital/analog systems, Microcontroller, Microprocessor, and Computer Architecture.
A good English communication, both verbal and written.
Strong interpersonal communication and teamwork skills.
Professionalism, Critical/Logical thinking, future goals focused.
High commitment to continuous learning for self-development. Preferred experiences:
Experienced in working with Linux/Unix environment.
Skills in using EDA tools (Simulator, Design, Verification).
Have working knowledge of basic design tools.
Previous internship with a Semiconductor company.
Research experience in relevant labs is a plus.
Senior/ Experienced Physical Design Engineer:
Job Description:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Taking part in flows development.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
A good English communication, both verbal and written.
Strong interpersonal communication and teamwork skills.
Professionalism, Critical/Logical thinking, future goals focused.
High commitment to continuous learning for self-development.
Benefit package:
Attractive salary package
Quality and modern work environment, flexibility, being innovative.
Good chance to study and develop a career path stably.
Premium Healthcare insurance for employees and family (spouse and children).
100% salary during probation period
Pay social insurance on gross salary
Team building and another internal activity.