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Mô tả công việc
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
Key responsibilities:
Physical Implementation of high speed interface IPs across multiple process technologies.
Driving all aspects from RTL to GDS including timing and physical sign-off.
Close interaction and collaborative team work with multiple functional groups (front end, analog, CAD) and the product team.
Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
Key responsibilities:
Physical Implementation of high speed interface IPs across multiple process technologies.
Driving all aspects from RTL to GDS including timing and physical sign-off.
Close interaction and collaborative team work with multiple functional groups (front end, analog, CAD) and the product team.
Yêu cầu
Requirements:
Bachelor or Master Degree in Electronics Engineering or related majors
0-2 year(s) physicaldesign experience
Hands-on experience with recent contribution to project tape-outs is a plus.
Understanding of the full design cycle from RTL to GDSII
Experience with advanced FinFET nodes including low-power design techniques is a plus.
Understanding of the underlying concepts ofIC design, implementation flows, physical and timing signoff and methodologies for deep submicron design.
Methodology driven with strong software and scripting skills (Perl, Tcl, Python); knowledge of CAD automation methods.
Familiar with place and route, synthesis,timing and power analysis tools - ICC2, Design Compiler, PrimeTime, Redhawk.
Familiar with physical verification tools and flows - ICV and other PV tools for LVS, DRC, ERC, PERC.
Excellent communication skills, ability to think and communicate at different levels of abstraction.
Demonstrates master skill at analysis and problem-solving.
Accountability, self-motivation, positive attitude and teamwork.
Has a strong desire to learn and explore new technologies.
Bachelor or Master Degree in Electronics Engineering or related majors
0-2 year(s) physicaldesign experience
Hands-on experience with recent contribution to project tape-outs is a plus.
Understanding of the full design cycle from RTL to GDSII
Experience with advanced FinFET nodes including low-power design techniques is a plus.
Understanding of the underlying concepts ofIC design, implementation flows, physical and timing signoff and methodologies for deep submicron design.
Methodology driven with strong software and scripting skills (Perl, Tcl, Python); knowledge of CAD automation methods.
Familiar with place and route, synthesis,timing and power analysis tools - ICC2, Design Compiler, PrimeTime, Redhawk.
Familiar with physical verification tools and flows - ICV and other PV tools for LVS, DRC, ERC, PERC.
Excellent communication skills, ability to think and communicate at different levels of abstraction.
Demonstrates master skill at analysis and problem-solving.
Accountability, self-motivation, positive attitude and teamwork.
Has a strong desire to learn and explore new technologies.
Quyền lợi
- Laptop
- Chế độ bảo hiểm
- Du Lịch
- Phụ cấp
- Chế độ thưởng
- Chăm sóc sức khỏe
- Đào tạo
- Nghỉ phép năm
- CLB thể thao
- Chế độ bảo hiểm
- Du Lịch
- Phụ cấp
- Chế độ thưởng
- Chăm sóc sức khỏe
- Đào tạo
- Nghỉ phép năm
- CLB thể thao
Thông tin khác
Địa điểm làm việc
➢ PVCOMBANK Building 5th and 8th Floors, Lot A2.1, 30/4 Street, Hai Chau District
Ngành nghề
C/C++ UI/UX
Tính chất công việc
Toàn thời gian
Vị trí (Chức vụ)
Nhân Viên/Chuyên Viên
Yêu cầu về bằng cấp (tối thiểu)
Đại Học
Yêu cầu kinh nghiệm
Trên 1 năm
➢ PVCOMBANK Building 5th and 8th Floors, Lot A2.1, 30/4 Street, Hai Chau District
Ngành nghề
C/C++ UI/UX
Tính chất công việc
Toàn thời gian
Vị trí (Chức vụ)
Nhân Viên/Chuyên Viên
Yêu cầu về bằng cấp (tối thiểu)
Đại Học
Yêu cầu kinh nghiệm
Trên 1 năm
Thông tin chung
- Ngày hết hạn: 12/09/2022
- Thu nhập: Thỏa thuận
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