Digital Design Verfication Engineer

ABOUT THE POSITION:
Are you interested in world-class products and future-oriented projects in the field of chip design? Then Qorvo is the right choice!
Qorvo's Power Management team designs a broad range of products which include Power Management Units (PMUs) for various applications such as Smartphones, notebooks, Solid State Drive, Digital Camera, IoT and wearable devices to battery management ( linear and switching charger for different battery types) which is a System on Chip that focus on high-efficiency motor controller for wide range of application such as home appliances, whitegoods, power tools, garden tools, drones.
Digital Design Verification Engineer works closely with digital & analog design engineers to verify the digital core of the PMUs, High power DC-DC and the SoC.
RESPONSIBILITIES
• Understand the requirements & the functional description of the device to ensure compliance with specifications and error-free functionality.
• Develop a digital circuit with System Verilog/Verilog for a new design or update the functions of an existing design of the circuit.
• Create a detailed block design using System Verilog/Verilog from functional requirement, evolve design specification and perform RTL coding, Lint checking.
• Create and execute a verification plan, including verification testbench/patterns/models/System Verilog Assertions (SVAs).
• Develop SVA properties for assertion, assumption and cover statement.
• Debug failures, fix testbench/model/checker issues, analyze and close coverage.
• Write scripts for automation of flow.
• Work with Analog team members to bring-up Chip/System level verification.
• Participate in post-silicon bring-up, validation and compliance testing.