Part-Time VLSI Mentor - ASIC Design & Verification / Physical Design| Vietnam
- Thỏa thuận
- 3 năm kinh nghiệm
Hạn nộp hồ sơ: 23/10/2026 (Còn 58 ngày)
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Location: Vietnam
Engagement: Part-Time | Remote
Industry: Semiconductor / VLSI
Language Requirement: 🇻🇳 Vietnamese - Mandatory | English - Preferred
About the OpportunityHCL GUVI is looking for experienced VLSI professionals in Vietnam to join our mentor network and guide aspiring engineers through practical, industry-oriented VLSI learning.
This is an excellent opportunity for professionals with strong hands-on experience in ASIC Design & Verification or Physical Design who are passionate about knowledge sharing, mentoring, and developing the next generation of semiconductor talent.
Role DescriptionThis is a part-time remote mentoring role where you will guide learners through core concepts and practical workflows across ASIC Front-End and Back-End Design.
As a VLSI Mentor, you will:
Conduct engaging online mentoring sessions and explain complex VLSI concepts in a practical and easy-to-understand manner.
Guide learners through RTL Design, ASIC Verification, UVM, Physical Design, and implementation flows, based on your area of expertise.
Review learner assignments, labs, projects, and technical work, providing constructive feedback.
Clarify technical doubts and help learners troubleshoot design and implementation challenges.
Share real-world industry practices, project experiences, and best practices.
Mentor learners on applying VLSI concepts to practical semiconductor projects.
Collaborate with the academic and content teams to improve course content and ensure alignment with current VLSI industry practices.
Contribute to developing hands-on lab exercises, projects, and technical learning activities.
Provide guidance on industry readiness, technical skills, and VLSI career development.
Maintain a supportive, professional, and inclusive learning environment.
1. ASIC Design & Verification Mentor - Front-EndKey Skills & Responsibilities
Strong understanding of Digital Design fundamentals and ASIC Design Flow.
Hands-on experience with Verilog / SystemVerilog / RTL.
Experience with Functional Verification and UVM.
Knowledge of testbench development, functional coverage, simulation, and debugging.
Experience with industry-standard EDA tools, preferably Synopsys.
Knowledge of Python / Perl / scripting languages.
FPGA prototyping or emulation experience is an added advantage.
Ability to explain technical concepts and provide practical industry guidance.
Strong analytical, problem-solving, communication, and mentoring skills.
2. Physical Design Mentor - Back-EndKey Skills & Responsibilities
Strong understanding of the complete ASIC Physical Design flow.
Hands-on experience with Floorplanning, Placement, CTS, Routing, and Timing Closure.
Experience with Cadence Innovus, Synopsys ICC2, or equivalent tools.
Strong knowledge of timing analysis, optimization, and physical verification.
Understanding of deep-submicron technologies and Physical Design challenges.
Experience in PPA optimization and design debugging.
Ability to guide learners through practical Physical Design scenarios and projects.
Strong communication, problem-solving, and mentoring skills.
Eligibility
Bachelor's / Master's degree in Electrical, Electronics, Computer Engineering, VLSI, or a related field.
3+ years of relevant industry experience in ASIC Design, Verification, or Physical Design.
Strong hands-on experience in the relevant VLSI domain.
Prior mentoring, training, teaching, or technical coaching experience is an advantage.
🇻🇳 Vietnamese language proficiency is mandatory.
Good English communication skills are preferred.
Candidates should be currently based in Vietnam.
Why Join as a Mentor?
Share your real-world semiconductor industry expertise.
Mentor and develop the next generation of VLSI professionals.
Flexible part-time remote engagement.
Contribute to Vietnam's growing semiconductor talent ecosystem.
Work with learners on practical projects, labs, and industry-oriented skills.
Expand your professional network within the VLSI and semiconductor ecosystem.
Interested?If you are an experienced ASIC Design, Verification, or Physical Design professional in Vietnam and are passionate about mentoring, we would love to hear from you.
Please share your updated CV/profile at:
📧 [protected info]
When applying, please mention:
VLSI Domain / Specialization
Years of Industry Experience
Current Location in Vietnam
Key EDA Tools
ASIC / Semiconductor Project Experience
Mentoring / Training Experience, if any
Join us in shaping the next generation of semiconductor talent in Vietnam. 🇻🇳
Engagement: Part-Time | Remote
Industry: Semiconductor / VLSI
Language Requirement: 🇻🇳 Vietnamese - Mandatory | English - Preferred
About the OpportunityHCL GUVI is looking for experienced VLSI professionals in Vietnam to join our mentor network and guide aspiring engineers through practical, industry-oriented VLSI learning.
This is an excellent opportunity for professionals with strong hands-on experience in ASIC Design & Verification or Physical Design who are passionate about knowledge sharing, mentoring, and developing the next generation of semiconductor talent.
Role DescriptionThis is a part-time remote mentoring role where you will guide learners through core concepts and practical workflows across ASIC Front-End and Back-End Design.
As a VLSI Mentor, you will:
Conduct engaging online mentoring sessions and explain complex VLSI concepts in a practical and easy-to-understand manner.
Guide learners through RTL Design, ASIC Verification, UVM, Physical Design, and implementation flows, based on your area of expertise.
Review learner assignments, labs, projects, and technical work, providing constructive feedback.
Clarify technical doubts and help learners troubleshoot design and implementation challenges.
Share real-world industry practices, project experiences, and best practices.
Mentor learners on applying VLSI concepts to practical semiconductor projects.
Collaborate with the academic and content teams to improve course content and ensure alignment with current VLSI industry practices.
Contribute to developing hands-on lab exercises, projects, and technical learning activities.
Provide guidance on industry readiness, technical skills, and VLSI career development.
Maintain a supportive, professional, and inclusive learning environment.
1. ASIC Design & Verification Mentor - Front-EndKey Skills & Responsibilities
Strong understanding of Digital Design fundamentals and ASIC Design Flow.
Hands-on experience with Verilog / SystemVerilog / RTL.
Experience with Functional Verification and UVM.
Knowledge of testbench development, functional coverage, simulation, and debugging.
Experience with industry-standard EDA tools, preferably Synopsys.
Knowledge of Python / Perl / scripting languages.
FPGA prototyping or emulation experience is an added advantage.
Ability to explain technical concepts and provide practical industry guidance.
Strong analytical, problem-solving, communication, and mentoring skills.
2. Physical Design Mentor - Back-EndKey Skills & Responsibilities
Strong understanding of the complete ASIC Physical Design flow.
Hands-on experience with Floorplanning, Placement, CTS, Routing, and Timing Closure.
Experience with Cadence Innovus, Synopsys ICC2, or equivalent tools.
Strong knowledge of timing analysis, optimization, and physical verification.
Understanding of deep-submicron technologies and Physical Design challenges.
Experience in PPA optimization and design debugging.
Ability to guide learners through practical Physical Design scenarios and projects.
Strong communication, problem-solving, and mentoring skills.
Eligibility
Bachelor's / Master's degree in Electrical, Electronics, Computer Engineering, VLSI, or a related field.
3+ years of relevant industry experience in ASIC Design, Verification, or Physical Design.
Strong hands-on experience in the relevant VLSI domain.
Prior mentoring, training, teaching, or technical coaching experience is an advantage.
🇻🇳 Vietnamese language proficiency is mandatory.
Good English communication skills are preferred.
Candidates should be currently based in Vietnam.
Why Join as a Mentor?
Share your real-world semiconductor industry expertise.
Mentor and develop the next generation of VLSI professionals.
Flexible part-time remote engagement.
Contribute to Vietnam's growing semiconductor talent ecosystem.
Work with learners on practical projects, labs, and industry-oriented skills.
Expand your professional network within the VLSI and semiconductor ecosystem.
Interested?If you are an experienced ASIC Design, Verification, or Physical Design professional in Vietnam and are passionate about mentoring, we would love to hear from you.
Please share your updated CV/profile at:
📧 [protected info]
When applying, please mention:
VLSI Domain / Specialization
Years of Industry Experience
Current Location in Vietnam
Key EDA Tools
ASIC / Semiconductor Project Experience
Mentoring / Training Experience, if any
Join us in shaping the next generation of semiconductor talent in Vietnam. 🇻🇳
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