- Chi tiết công việc
- Giới thiệu công ty
Thu nhập: Thương lượng
Loại hình: Toàn thời gian
Kinh nghiệm: 3 năm
Mô tả công việc
• Develops the logic design, register transfer level (RTL) coding, simulation.
• Participates and collaborates in the definition of architecture and microarchitecture features of the block, subsystem, and SoC.
• Develops HVM content for rapid bring up and ramp to production on the automatic test equipment (ATE).
• Optimizes logic to qualify the design to meet power, performance, area, timing, test coverage, DPM, and test time/vector memory reduction goals as well as design integrity for physical implementation.
• Reviews the verification plan and drives verification of the design to achieve desired architecture and microarchitecture specifications.
• Ensures design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Integrates blocks into functional IP and SoC and supports SoC customers to ensure high quality integration of the IP block.
• Collaborates with post-silicon and manufacturing team to verify the feature on silicon, support debug requirements, and document all learnings and improvements requirement in design and validation.
• Drives high test coverage through structural and specific IP tests to achieve the quality and DPM objectives of the product and develops HVM content for rapid bring up and production on the ATE.
• Participates and collaborates in the definition of architecture and microarchitecture features of the block, subsystem, and SoC.
• Develops HVM content for rapid bring up and ramp to production on the automatic test equipment (ATE).
• Optimizes logic to qualify the design to meet power, performance, area, timing, test coverage, DPM, and test time/vector memory reduction goals as well as design integrity for physical implementation.
• Reviews the verification plan and drives verification of the design to achieve desired architecture and microarchitecture specifications.
• Ensures design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Integrates blocks into functional IP and SoC and supports SoC customers to ensure high quality integration of the IP block.
• Collaborates with post-silicon and manufacturing team to verify the feature on silicon, support debug requirements, and document all learnings and improvements requirement in design and validation.
• Drives high test coverage through structural and specific IP tests to achieve the quality and DPM objectives of the product and develops HVM content for rapid bring up and production on the ATE.
Yêu cầu
We are looking for B. Eng or M. Eng in Electronics, Computer or Electrical Engineering graduates who have 3+ years of digital design exposure and experience.
• Job Working experience in verification and integration activities including but not limited to test-plan development, test writing, debug, integration and familiar with verification methodologies such as OVM, UVM or VMM.
• Enjoy pick up protocol knowledge in I/O specifications such as USB2, USB3, SATA, PCIe.
• Genuine curiosity into microprocessors, computer system architecture and high speed design as well as producer consumer transactions.
• Also dedicated and proficient in digital state machine architecture and logic design.
• Working level mastery of Unix based design environment, industry standard digital design tools, scripting languages and ASIC flows
• Job Working experience in verification and integration activities including but not limited to test-plan development, test writing, debug, integration and familiar with verification methodologies such as OVM, UVM or VMM.
• Enjoy pick up protocol knowledge in I/O specifications such as USB2, USB3, SATA, PCIe.
• Genuine curiosity into microprocessors, computer system architecture and high speed design as well as producer consumer transactions.
• Also dedicated and proficient in digital state machine architecture and logic design.
• Working level mastery of Unix based design environment, industry standard digital design tools, scripting languages and ASIC flows
Quyền lợi
Thưởng
Competitive Compensation & Benefit (13th month salary, attractive bonuses,..)
Chăm sóc sức khoẻ
Premium Health Care Package for you and your family
Đào tạo
Attractive Training Programs & Exciting team activities
Competitive Compensation & Benefit (13th month salary, attractive bonuses,..)
Chăm sóc sức khoẻ
Premium Health Care Package for you and your family
Đào tạo
Attractive Training Programs & Exciting team activities
Thông tin khác
NGÀY ĐĂNG
[protected info]
CẤP BẬC
Nhân viên
NGÀNH NGHỀ
Công Nghệ Thông Tin/Viễn Thông > Phần Cứng Máy Tính
KỸ NĂNG
RTL Verification, System Verilog, Formal Verification, UVM, Functional Verification
LĨNH VỰC
Sản xuất
NGÔN NGỮ TRÌNH BÀY HỒ SƠ
Tiếng Anh
SỐ NĂM KINH NGHIỆM TỐI THIỂU
2
QUỐC TỊCH
Không hiển thị
Xem thêm
[protected info]
CẤP BẬC
Nhân viên
NGÀNH NGHỀ
Công Nghệ Thông Tin/Viễn Thông > Phần Cứng Máy Tính
KỸ NĂNG
RTL Verification, System Verilog, Formal Verification, UVM, Functional Verification
LĨNH VỰC
Sản xuất
NGÔN NGỮ TRÌNH BÀY HỒ SƠ
Tiếng Anh
SỐ NĂM KINH NGHIỆM TỐI THIỂU
2
QUỐC TỊCH
Không hiển thị
Xem thêm
Thông tin chung
- Thu nhập: Thương lượng
Cách thức ứng tuyển
Ứng viên nộp hồ sơ trực tuyến bằng cách bấm nút Ứng tuyển bên dưới:
Hạn nộp: 04/01/2025
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